Senior Principal Digital Engineer (FPGA and ASIC Design)
Company: Northrop Grumman
Location: Baltimore
Posted on: October 21, 2024
Job Description:
Senior Principal Digital Engineer (FPGA and ASIC Design)
Requisition ID: R10171248
- Location: Baltimore, Maryland, United States of America
- Clearance Type: -Secret
- Telecommute: -No- Teleworking not available for this
position
- Shift: -1st Shift (United States of America)
- Travel Required: -Yes, 10% of the Time
- Relocation Assistance: -Relocation assistance may be
available
- Positions Available: -1 At Northrop Grumman, our employees have
incredible opportunities to work on revolutionary systems that
impact people's lives around the world today, and for generations
to come. Our pioneering and inventive spirit has enabled us to be
at the forefront of many technological advancements in our nation's
history - from the first flight across the Atlantic Ocean, to
stealth bombers, to landing on the moon.We are looking for you to
join our team as a Principal Digital Engineer/Senior Principal
Digital Engineer (FPGA and ASIC Design) based out of Linthicum,
MD.What You'll get to Do:
- As an integral part of our cross-discipline engineering team in
Mission Systems that encompasses Digital Engineering to support
FPGA and ASIC product development.
- Work closely with design engineers and utilize your knowledge
of modern design methods, tools and techniques.
- Development of testbench, tests, verification IP (VIP),
verification models, coverage models, extensive simulation and
debug, code coverage and functional coverage, generation and
analysis of reports and metrics, documentation etc.
- Ability to operate in a team environment and collaborate across
different teams as required to accomplish the goals.This position
is contingent upon contract award, successful transfer of an active
DoD Secret Clearance and the ability to obtain Special Program
Access (SAP) prior to start. -Basic Qualifications:
- Bachelor's degree with 8 years of experience, a Master's degree
with 6 years of experience or a PhD with 3 years of experience in
Electrical Engineering, Computer Engineering, Computer Science, or
related technical fields; an additional 4 years of experience may
be considered in lieu of a degree.
- U.S Citizenship is required.
- An active DoD Secret Security Clearance is required with the
ability to obtain Special Program Access (SAP) prior to start.
- Experience with industry standard FPGA design implementation
tools for IP integration, PnR, CDC such as Xilinx Vivado, Intel
Quartus, and QuestaSim.
- Working knowledge of full product life cycle (requirements,
design, implementation and test) of FPGA Design and/or ASIC
Design.
- Knowledge of System Verilog, Verilog and/or VHDL.Preferred
Qualifications:
- Advanced Degrees in Electrical Engineering, Computer
Engineering, Computer Science, or related technical fields.
- Active DoD Top Secret Clearance or higher.
- Experience with industry standard ASIC front-end design tools
for synthesis, LEC, CDC.
- Experience with STA constraints generation and timing
closure.
- Experience with MATLAB, Mentor Graphics design tools, Synopsys
or similar tool.
- Familiarity with Xilinx and Intel FPGA technology.As a
full-time employee of Northrop Grumman Mission Systems, you are
eligible for our robust benefits package including: -
- 401k
- Educational Assistance
- Life Insurance
- Employee Assistance Programs & Work/Life SolutionsThis
positions standard work schedule is a 9/80. The 9/80 schedule
allows employees who work a nine-hour day Monday through Thursday
to take every other Friday off.Salary Range: $139,700 - $209,500
The above salary range represents a general guideline; however,
Northrop Grumman considers a number of factors when determining
base salary offers such as the scope and responsibilities of the
position and the candidate's experience, education, skills and
current market conditions.Northrop Grumman is committed to hiring
and retaining a diverse workforce. We are proud to be an Equal
Opportunity/Affirmative Action Employer, making decisions without
regard to race, color, religion, creed, sex, sexual orientation,
gender identity, marital status, national origin, age, veteran
status, disability, or any other protected class.
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Keywords: Northrop Grumman, Reston , Senior Principal Digital Engineer (FPGA and ASIC Design), Engineering , Baltimore, Virginia
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